Athlon (Socket A) |
AMD Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
Duron-600 MMX 3DNow! (Spitfire) June 19, 2000 - ($112) | 453 pins 600MHz (100x6.0) (64-bit dual-pumped bus) 1.5v or 1.6v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 64KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 25 million 0.18#181;m process 100mm#178; die |
Duron-650 MMX 3DNow! (Spitfire) June 19, 2000 - ($154) | 453 pins 650MHz (100x6.5) (64-bit dual-pumped bus) 1.5v or 1.6v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 64KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 25 million 0.18#181;m process 100mm#178; die |
Duron-700 MMX 3DNow! (Spitfire) June 19, 2000 - ($192) | 453 pins 700MHz (100x7.0) (64-bit dual-pumped bus) 1.5v or 1.6v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 64KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 25 million 0.18#181;m process 100mm#178; die |
Duron-750 MMX 3DNow! (Spitfire) September 5, 2000 - ($181) | 453 pins 750MHz (100x7.5) (64-bit dual-pumped bus) 1.6v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 64KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 25 million 0.18#181;m process 100mm#178; die |
Duron-800 MMX 3DNow! (Spitfire) October 17, 2000 - ($170) | 453 pins 800MHz (100x8.0) (64-bit dual-pumped bus) 1.6v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 64KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 25 million 0.18#181;m process 100mm#178; die |
Duron-850 MMX 3DNow! (Spitfire) January 8, 2001 - ($149) | 453 pins 850MHz (100x8.5) (64-bit dual-pumped bus) 1.6v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 64KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 25 million 0.18#181;m process 100mm#178; die |
Duron-900 MMX 3DNow! (Spitfire) April 2, 2001 - ($129) | 453 pins 900MHz (100x9.0) (64-bit dual-pumped bus) 1.6v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 64KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 25 million 0.18#181;m process 100mm#178; die |
Duron-950 MMX 3DNow! (Spitfire) June 6, 2001 - ($122) | 453 pins 950MHz (100x9.5) (64-bit dual-pumped bus) 1.6v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 64KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 25 million 0.18#181;m process 100mm#178; die |
Duron-1.0G MMX 3DNow! SSE (Morgan) August 20, 2001 - ($89) | 453 pins 1000MHz (100x10.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 64KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 25.2 million 0.18#181;m process 106mm#178; die |
Duron-1.1G MMX 3DNow! SSE (Morgan) October 1, 2001 - ($103) | 453 pins 1100MHz (100x11.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 64KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 25.2 million 0.18#181;m process 106mm#178; die |
Duron-1.2G MMX 3DNow! SSE (Morgan) November 15, 2001 - ($103) | 453 pins 1200MHz (100x12.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 64KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 25.2 million 0.18#181;m process 106mm#178; die |
Duron-1.3G MMX 3DNow! SSE (Morgan) January 21, 2002 - ($118) | 453 pins 1300MHz (100x13.0) (64-bit dual-pumped bus) ?v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 64KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 25.2 million 0.18#181;m process 106mm#178; die |
Duron-1.4G MMX 3DNow! SSE (Morgan) 2Q 2002? | 453 pins 1400MHz (100x14.0) (64-bit dual-pumped bus) ?v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 64KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 25.2 million 0.18#181;m process 106mm#178; die |
Duron-1.5G MMX 3DNow! SSE (Morgan) 3Q 2002? | 453 pins 1500MHz (100x15.0) (64-bit dual-pumped bus) ?v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 64KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 25.2 million 0.18#181;m process 106mm#178; die |
Duron-1.33G MMX 3DNow! SSE (Appaloosa) 3Q 2002? | 453 pins 1333MHz (133x10.0) (64-bit dual-pumped bus) ?v | Socket A | 64KB data (2-way) 64KB instruction (2-way) ?KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | ? million 0.13#181;m process ?mm#178; die |
Athlon-750 MMX 3DNow! (Thunderbird) June 5, 2000 - ($319) | 453 pins 750MHz (100x7.5) (64-bit dual-pumped bus) 1.7v or 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37 million 0.18#181;m process 120mm#178; die |
Athlon-800 MMX 3DNow! (Thunderbird) June 5, 2000 - ($359) | 453 pins 800MHz (100x8.0) (64-bit dual-pumped bus) 1.7v or 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37 million 0.18#181;m process 120mm#178; die |
Athlon-850 MMX 3DNow! (Thunderbird) June 5, 2000 - ($507) | 453 pins 850MHz (100x8.5) (64-bit dual-pumped bus) 1.7v or 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37 million 0.18#181;m process 120mm#178; die |
Athlon-900 MMX 3DNow! (Thunderbird) June 5, 2000 - ($589) | 453 pins 900MHz (100x9.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37 million 0.18#181;m process 120mm#178; die |
Athlon-950 MMX 3DNow! (Thunderbird) June 5, 2000 - ($759) | 453 pins 950MHz (100x9.5) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37 million 0.18#181;m process 120mm#178; die |
Athlon-1G MMX 3DNow! (Thunderbird) June 5, 2000 - ($990) | 453 pins 1000MHz (100x10.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37 million 0.18#181;m process 120mm#178; die |
Athlon-1G MMX 3DNow! (Thunderbird) October 30, 2000 - ($385) | 453 pins 1000MHz (133x7.5) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37 million 0.18#181;m process 120mm#178; die |
Athlon-1.1G MMX 3DNow! (Thunderbird) August 28, 2000 - ($853) | 453 pins 1100MHz (100x11.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37 million 0.18#181;m process 120mm#178; die |
Athlon-1.13G MMX 3DNow! (Thunderbird) October 30, 2000 - ($506) | 453 pins 1133MHz (133x8.5) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37 million 0.18#181;m process 120mm#178; die |
Athlon-1.2G MMX 3DNow! (Thunderbird) October 17, 2000 - ($612) | 453 pins 1200MHz (100x12.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37 million 0.18#181;m process 120mm#178; die |
Athlon-1.2G MMX 3DNow! (Thunderbird) October 30, 2000 - ($673) | 453 pins 1200MHz (133x9.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37 million 0.18#181;m process 120mm#178; die |
Athlon-1.3G MMX 3DNow! (Thunderbird) March 22, 2001 - ($318) | 453 pins 1300MHz (100x13.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37 million 0.18#181;m process 120mm#178; die |
Athlon-1.33G MMX 3DNow! (Thunderbird) March 22, 2001 - ($350) | 453 pins 1333MHz (133x10.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37 million 0.18#181;m process 120mm#178; die |
Athlon-1.4G MMX 3DNow! (Thunderbird) June 6, 2001 - ($253) | 453 pins 1400MHz (100x14.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37 million 0.18#181;m process 120mm#178; die |
Athlon-1.4G MMX 3DNow! (Thunderbird) June 6, 2001 - ($253) | 453 pins 1400MHz (133x10.5) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37 million 0.18#181;m process 120mm#178; die |
Athlon MP-1.0G MMX 3DNow! SSE (Palomino) June 5, 2001 - ($215) | 453 pins 1000MHz (133x7.5) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37.5 million 0.18#181;m process 128mm#178; die |
Athlon MP-1.2G MMX 3DNow! SSE (Palomino) June 5, 2001 - ($265) | 453 pins 1200MHz (133x9.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37.5 million 0.18#181;m process 128mm#178; die |
Athlon MP-1500+ MMX 3DNow! SSE (Palomino) October 15, 2001 - ($180) | 453 pins 1333MHz (133x10.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37.5 million 0.18#181;m process 128mm#178; die |
Athlon MP-1600+ MMX 3DNow! SSE (Palomino) October 15, 2001 - ($210) | 453 pins 1400MHz (133x10.5) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37.5 million 0.18#181;m process 128mm#178; die |
Athlon MP-1800+ MMX 3DNow! SSE (Palomino) October 15, 2001 - ($302) | 453 pins 1533MHz (133x11.5) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37.5 million 0.18#181;m process 128mm#178; die |
Athlon MP-1900+ MMX 3DNow! SSE (Palomino) December 12, 2001 - ($319) | 453 pins 1600MHz (133x12.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37.5 million 0.18#181;m process 128mm#178; die |
Athlon MP-2100+ MMX 3DNow! SSE (Palomino) 1H 2002? | 453 pins 1733MHz (133x13.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37.5 million 0.18#181;m process 128mm#178; die |
Athlon XP-1500+ MMX 3DNow! SSE (Palomino) October 9, 2001 - ($130) | 453 pins 1333MHz (133x10.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37.5 million 0.18#181;m process 128mm#178; die |
Athlon XP-1600+ MMX 3DNow! SSE (Palomino) October 9, 2001 - ($160) | 453 pins 1400MHz (133x10.5) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37.5 million 0.18#181;m process 128mm#178; die |
Athlon XP-1700+ MMX 3DNow! SSE (Palomino) October 9, 2001 - ($190) | 453 pins 1466MHz (133x11.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37.5 million 0.18#181;m process 128mm#178; die |
Athlon XP-1800+ MMX 3DNow! SSE (Palomino) October 9, 2001 - ($252) | 453 pins 1533MHz (133x11.5) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37.5 million 0.18#181;m process 128mm#178; die |
Athlon XP-1900+ MMX 3DNow! SSE (Palomino) November 5, 2001 - ($269) | 453 pins 1600MHz (133x12.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37.5 million 0.18#181;m process 128mm#178; die |
Athlon XP-2000+ MMX 3DNow! SSE (Palomino) January 7, 2002 - ($339) | 453 pins 1666MHz (133x12.5) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37.5 million 0.18#181;m process 128mm#178; die |
Athlon XP-2100+ MMX 3DNow! SSE (Palomino) 1Q 2002? | 453 pins 1733MHz (133x13.0) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37.5 million 0.18#181;m process 128mm#178; die |
Athlon XP-2200+ MMX 3DNow! SSE (Palomino) 1Q 2002? | 453 pins 1800MHz (133x13.5) (64-bit dual-pumped bus) 1.75v | Socket A | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | 37.5 million 0.18#181;m process 128mm#178; die |
Athlon XP-2400+ MMX 3DNow! SSE (Thoroughbred) 2Q 2002? | 453 pins 1733MHz (133x13.0) (64-bit dual-pumped bus) 1.6v | Socket A | 64KB data (2-way) 64KB instruction (2-way) ?KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | ? million 0.13#181;m process 80mm#178; die |
Athlon XP-2500+ MMX 3DNow! SSE (Thoroughbred) 2Q 2002? | 453 pins 1800MHz (133x13.5) (64-bit dual-pumped bus) 1.6v | Socket A | 64KB data (2-way) 64KB instruction (2-way) ?KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | ? million 0.13#181;m process 80mm#178; die |
Athlon XP-2600+ MMX 3DNow! SSE (Thoroughbred) 3Q 2002? | 453 pins 1866MHz (133x14.0) (64-bit dual-pumped bus) 1.6v | Socket A | 64KB data (2-way) 64KB instruction (2-way) ?KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | ? million 0.13#181;m process 80mm#178; die |
Athlon XP-??? MMX 3DNow! SSE (Barton) 3Q 2002? | 453 pins ?MHz (133x?) (64-bit dual-pumped bus) ?v | Socket A | 64KB data (2-way) 64KB instruction (2-way) ?KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | ? million 0.13#181;m process ?mm#178; die |
Athlon XP-??? MMX 3DNow! SSE (Thoroughbred-S) 2002? | 453 pins ?MHz (?x?) (64-bit dual-pumped bus) ?v | Socket A | 64KB data (2-way) 64KB instruction (2-way) ?KB on-Die unified L2 (16-way exclusive) * 64GB cacheable | ? million 0.09#181;m process 50mm#178; die |